###############################################################
# Copyright (c) 2004 Xilinx, Inc. All Rights Reserved.
# You may copy and modify these files for your own internal use solely with
# Xilinx programmable logic devices and  Xilinx EDK system or create IP
# modules solely for Xilinx programmable logic devices and Xilinx EDK system.
# No rights are granted to distribute any files unless they are distributed in
# Xilinx programmable logic devices. 
###############################################################
#uses "xillib.tcl"


proc generate {drv_handle} {

    #---------------------------
    # #defines in xparameters.h
    #---------------------------
    xdefine_include_file $drv_handle "xparameters.h" "XEmc" "C_NUM_BANKS_MEM"


    #---------------------------------
    # memory_banks in xparameters.h
    #---------------------------------
    xdefine_include_file_membank $drv_handle "xparameters.h" "C_MEM0_BASEADDR" "C_MEM0_HIGHADDR" "C_MEM1_BASEADDR" "C_MEM1_HIGHADDR" "C_MEM2_BASEADDR" "C_MEM2_HIGHADDR" "C_MEM3_BASEADDR" "C_MEM3_HIGHADDR"
    
}


